2024年6月最新影响因子数据已经更新,欢迎查询! 如果您对期刊系统有任何需求或者问题,欢迎
反馈给我们。基本信息 | 登录收藏 | |||||||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
期刊名字 | IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS IEEE T VLSI SYST (此期刊被最新的JCR期刊SCIE收录) LetPub评分 5.9
58人评分
我要评分
声誉 6.8 影响力 4.9 速度 7.3 | |||||||||||||||||||||||||||||||
期刊ISSN | 1063-8210 | 微信扫码收藏此期刊 | ||||||||||||||||||||||||||||||
E-ISSN | 1557-9999 | |||||||||||||||||||||||||||||||
2023-2024最新影响因子 (数据来源于搜索引擎) | 2.8 点击查看影响因子趋势图 | |||||||||||||||||||||||||||||||
实时影响因子 | 截止2024年10月29日:2.079 | |||||||||||||||||||||||||||||||
2023-2024自引率 | 10.70%点击查看自引率趋势图 | |||||||||||||||||||||||||||||||
五年影响因子 | 2.8 | |||||||||||||||||||||||||||||||
JCI期刊引文指标 | 0.67 | |||||||||||||||||||||||||||||||
h-index | 95 | |||||||||||||||||||||||||||||||
CiteScore ( 2024年最新版) |
| |||||||||||||||||||||||||||||||
期刊简介 |
| |||||||||||||||||||||||||||||||
期刊官方网站 | http://ieeexplore.ieee.org/xpl/tocresult.jsp?isnumber=5393244&isYear=2010 | |||||||||||||||||||||||||||||||
期刊投稿网址 | https://mc.manuscriptcentral.com/tvlsi-ieee | |||||||||||||||||||||||||||||||
期刊语言要求 | 经LetPub语言功底雄厚的美籍native English speaker精心编辑的稿件,不仅能满足IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS的语言要求,还能让IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS编辑和审稿人得到更好的审稿体验,让稿件最大限度地被IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS编辑和审稿人充分理解和公正评估。LetPub的专业SCI论文编辑服务(包括SCI论文英语润色,同行资深专家修改润色,SCI论文专业翻译,SCI论文格式排版,专业学术制图等)帮助作者准备稿件,已助力全球15万+作者顺利发表论文。部分发表范例可查看:服务好评 论文致谢(2篇) 。
提交文稿 | |||||||||||||||||||||||||||||||
是否OA开放访问 | No | |||||||||||||||||||||||||||||||
通讯方式 | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 445 HOES LANE, PISCATAWAY, USA, NJ, 08855-4141 | |||||||||||||||||||||||||||||||
出版商 | Institute of Electrical and Electronics Engineers Inc. | |||||||||||||||||||||||||||||||
涉及的研究方向 | 工程技术-工程:电子与电气 | |||||||||||||||||||||||||||||||
出版国家或地区 | UNITED STATES | |||||||||||||||||||||||||||||||
出版语言 | English | |||||||||||||||||||||||||||||||
出版周期 | Bimonthly | |||||||||||||||||||||||||||||||
出版年份 | 0 | |||||||||||||||||||||||||||||||
年文章数 | 241点击查看年文章数趋势图 | |||||||||||||||||||||||||||||||
Gold OA文章占比 | 7.13% | |||||||||||||||||||||||||||||||
研究类文章占比: 文章 ÷(文章 + 综述) | 99.59% | |||||||||||||||||||||||||||||||
WOS期刊SCI分区 ( 2023-2024年最新版) | WOS分区等级:2区
| |||||||||||||||||||||||||||||||
中国科学院《国际期刊预警 名单(试行)》名单 | 2024年02月发布的2024版:不在预警名单中 2023年01月发布的2023版:不在预警名单中 2021年12月发布的2021版:不在预警名单中 2020年12月发布的2020版:不在预警名单中 | |||||||||||||||||||||||||||||||
中国科学院SCI期刊分区 ( 2023年12月最新升级版) | 点击查看中国科学院SCI期刊分区趋势图
| |||||||||||||||||||||||||||||||
中国科学院SCI期刊分区 ( 2022年12月升级版) |
| |||||||||||||||||||||||||||||||
中国科学院SCI期刊分区 ( 2021年12月旧的升级版) |
| |||||||||||||||||||||||||||||||
SCI期刊收录coverage | Science Citation Index Expanded (SCIE) (2020年1月,原SCI撤销合并入SCIE,统称SCIE) Scopus (CiteScore) | |||||||||||||||||||||||||||||||
PubMed Central (PMC)链接 | http://www.ncbi.nlm.nih.gov/nlmcatalog?term=1063-8210%5BISSN%5D | |||||||||||||||||||||||||||||||
平均审稿速度 | 网友分享经验: 一般,3-6周 | |||||||||||||||||||||||||||||||
平均录用比例 | 网友分享经验: 容易 | |||||||||||||||||||||||||||||||
LetPub助力发表 | 经LetPub编辑的稿件平均录用比例是未经润色的稿件的1.5倍,平均审稿时间缩短40%。众多作者在使用LetPub的专业SCI论文编辑服务(包括SCI论文英语润色,同行资深专家修改润色,SCI论文专业翻译,SCI论文格式排版,专业学术制图等)后论文在IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS顺利发表。
快看看作者怎么说吧:服务好评 论文致谢 | |||||||||||||||||||||||||||||||
期刊常用信息链接 |
|
中国学者近期发表的论文 | |
1. | A Low-Cost Reduced-Latency DRAM Architecture With Dynamic Reconfiguration of Row Decoder Author: Bai, Fujun; Wang, Song; Jia, Xuerong; Guo, Yixin; Yu, Bing; Wang, Hang; Lai, Cong; Ren, Qiwei; Sun, Hongbin Journal: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. 2023; Vol. 31, Issue 1, pp. 128-141. DOI: 10.1109/TVLSI.2022.3219437 DOI |
2. | A Security-Enhanced, Charge-Pump-Free, ISO14443-A-/ISO10373-6-Compliant RFID Tag With 16.2-mu W Embedded RRAM and Reconfigurable Strong PUF Author: Ren, Qirui; Huo, Qiang; Chen, Zhisheng; Gao, Qi; Wang, Yiming; Yang, Yiming; Wu, Hao; Fu, Xiangqu; Xu, Xiaoxin; Luo, Qing; Gao, Jianfeng; Chen, Chengying; Zhao, Xiaojin; Lei, Dengyun; Wang, Xinghua; Zhang, Feng; Chen, Yong; Mak, Pui-In Journal: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. 2023; Vol. 31, Issue 2, pp. 243-252. DOI: 10.1109/TVLSI.2022.3222522 DOI |
3. | A 4.5-W, 18.5-24.5-GHz GaN Power Amplifier Employing Chebyshev Matching Technique Author: Wang, Yujia; Zhang, Jincheng; Chen, Yong; Ren, Junyan; Ma, Shunli Journal: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. 2023; Vol. 31, Issue 2, pp. 233-242. DOI: 10.1109/TVLSI.2022.3225967 DOI |
4. | Fast Estimation of a Statistical Eye Diagram for Nonlinear High-Speed Links Based on the Minimum Required Order of the Multiple Edge Response Method Author: Wang, Jun; Luo, Yuhuan; Guo, Wenting; Wu, Feng; Chu, Xiuqin Journal: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. 2023; Vol. 31, Issue 2, pp. 210-218. DOI: 10.1109/TVLSI.2022.3225533 DOI |
5. | Multiple-Mode-Supporting Floating-Point FMA Unit for Deep Learning Processors Author: Tan, Hongbing; Tong, Gan; Huang, Libo; Xiao, Liquan; Xiao, Nong Journal: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. 2023; Vol. 31, Issue 2, pp. 253-266. DOI: 10.1109/TVLSI.2022.3226185 DOI |
6. | A High-Speed Low-Noise Comparator With Auxiliary-Inverter-Based Common Mode-Self-Regulation for Low-Supply-Voltage SAR ADCs Author: Qiu, Lei; Meng, Tianyi; Yao, Bingbing; Du, Zihao; Yuan, Xiaohua Journal: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. 2023; Vol. 31, Issue 1, pp. 152-156. DOI: 10.1109/TVLSI.2022.3224237 DOI |
7. | BitXpro: Regularity-Aware Hardware Runtime Pruning for Deep Neural Networks Author: Li, Hongyan; Lu, Hang; Wang, Haoxuan; Deng, Shengji; Li, Xiaowei Journal: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. 2023; Vol. 31, Issue 1, pp. 90-103. DOI: 10.1109/TVLSI.2022.3221732 DOI |
8. | Reliability Evaluation and Fault Tolerance Design for FPGA Implemented Reed Solomon (RS) Erasure Decoders Author: Gao, Zhen; Shi, Jinchang; Liu, Qiang; Ullah, Anees; Reviriego, Pedro Journal: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. 2023; Vol. 31, Issue 1, pp. 142-146. DOI: 10.1109/TVLSI.2022.3224137 DOI |
9. | Approximate Softmax Functions for Energy-Efficient Deep Neural Networks Author: Chen, Ke; Gao, Yue; Waris, Haroon; Liu, Weiqiang; Lombardi, Fabrizio Journal: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. 2023; Vol. 31, Issue 1, pp. 4-16. DOI: 10.1109/TVLSI.2022.3224011 DOI |
10. | A 6.0-GS/s Time-Interleaved DAC Using an Asymmetric Current-Tree Summation Network and Differential Clock Timing Calibration Author: Fu, Yushen; Huang, Chengyu; Sun, Limeng; Meng, Weiguang; Li, Xueqing; Yang, Huazhong Journal: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. 2023; Vol. 31, Issue 2, pp. 199-209. DOI: 10.1109/TVLSI.2022.3232516 DOI |
|
|
|
联系我们 | 站点地图 | 友情链接 | 授权代理商 | 加入我们
© 2010-2024 中国: LetPub上海 网站备案号:沪ICP备10217908号-1 沪公网安备号:31010402006960 (网站)31010405000484 (蝌蝌APP)
增值电信业务经营许可证:沪B2-20211595 网络文化经营许可证:沪网文[2023]2004-152号
礼翰商务信息咨询(上海)有限公司 办公地址:上海市徐汇区漕溪北路88号圣爱大厦1803室